[Placidus (Mike and Trish)]

Originally Posted by Shiraz

M&T

The chip has variable (inverse) gain that is controlled by a "true" gain number that sets the on-board conversion ratio (a higher gain number gives more ADU per electron). The translation between the gain number and the (inverse) gain is provided on the website charts - 200 is 20"db" gain although it is not specified "referred to what" - anyway, from the charts, a gain number of 200 corresponds to an (inverse) gain of ~0.6e/ADU with 12 bits output.

Then to make it a bit more complicated, the (hardware or the software?) changes the data from 12 bits to 16 bits by padding the bottom 4 bits with zeros. This is effectively an additional "true" gain of 16x, so the (inverse) gain in 16 bit ADU terms is ~0.6/16 e/ADU. ie gain 200 corresponds to an (inverse) gain of ~0.0375 e/ADU. At this setting, the well depth is only ~2000e, but the read noise has dropped to <1.5e.

I really hope this is some help - it was bad enough that everyone started calling the e/ADU conversion ratio a "gain". But then ZWO introduced a "true" gain number and also neglected to mention the hidden additional true gain of converting from 12 bits to 16 bits. Aaaargh.

if you are thinking about incorporating the 1600 into your acquisition software, perhaps be aware that it uses a streaming mode of USB3, which apparently puts heavy demands on the PC and doesn't tolerate faults. I am out of my depth on the details, but as far as I could tell, none of the standard acquisition packages worked properly when the 1600 was first released and the SGpro developers in particular had to modify some memory management? aspects of their package to make it work reliably.

Thanks so much, Ray. That makes complete sense now. And thanks for the warning about the brittle USB3 interface. My next job is to start to understand the physics of why increasing the "true" gain reduces the read noise. I found an old and out-of-date article on the electronics of a CMOS pixel which shows the presence of a per-pixel mosfet amplifier (must have an input impedance of tera-ohms not to deplete the charge during the exposure, and runs off the smell of an oily electron) that measures the charge. If that is where the "true" gain is applied, (i.e. assuming the top FET of the right hand pair in the diagram) before the A/D converter, I can see how it might reduce both the read noise and the well depth, though I'd like to understand better.

Sorry about the appalling typo in my original question, where I put "So you ..." instead of "Do you ...?"

Thanks Colin also for the extra info. It all helps.

Best,
Mike